[Paper] Human-like Working Memory from Artificial Intrinsic Plasticity Neurons
Source: arXiv - 2512.15829v1
Overview
The paper introduces IPNet, a neuromorphic system that mimics human working memory by leveraging the intrinsic plasticity of magnetic tunnel‑junction (MTJ) neurons. By co‑designing hardware and software, the authors achieve ultra‑low‑energy, near‑sensor processing that rivals—and often surpasses—state‑of‑the‑art recurrent and 3‑D CNN models on dynamic vision tasks.
Key Contributions
- Intrinsic‑Plasticity Neurons (IPNeurons): Exploit Joule‑heating dynamics of MTJs to create a physical, volatile memory mechanism analogous to biological working memory.
- Hardware‑Software Co‑Design: Entire network built from fabricated MTJ devices; no post‑fabrication parameter tuning required.
- Human‑Like Memory Behavior: Demonstrates comparable performance to human subjects on n‑back, free‑recall, and interference experiments.
- Performance Gains:
- 99.65 % accuracy on an 11‑class DVS gesture benchmark.
- 99.48 % accuracy on a newly released 22‑class time‑reversed gesture set, beating RNN/LSTM/2+1D‑CNN baselines with identical backbones.
- 14.4 % reduction in steering‑angle prediction error on the DDD‑20 autonomous‑driving dataset versus a ResNet‑LSTM baseline.
- Energy & Area Efficiency:
- 2,874× lower memory power than LSTMs and 90,920× lower than parallel 3‑D CNNs.
- ~1.5 µm² footprint per neuron (28 nm CMOS), >20× smaller than conventional leaky‑integrate‑and‑fire (LIF) implementations.
- “Memory‑at‑the‑Frontier” Effect: Shows that placing the volatile memory directly at the sensor interface maximizes dynamic vision performance, supporting a bio‑plausible near‑sensor compute paradigm.
Methodology
- Device Physics Layer: Fabricated MTJ stacks are driven into a controlled heating regime; the resulting resistance change serves as a short‑lived state (intrinsic plasticity) that decays naturally, mirroring the volatility of human working memory.
- Neuron Model: Each IPNeuron maps the physical resistance trajectory to a spike‑rate output, eliminating the need for external capacitors or digital memory buffers.
- Network Architecture: Standard deep‑learning backbones (e.g., ResNet‑style feature extractors) are augmented with a thin “working‑memory” layer composed solely of IPNeurons. The rest of the network remains unchanged, allowing fair head‑to‑head comparisons with RNN/LSTM/3‑D‑CNN baselines.
- Training & Inference: Networks are trained in software using the measured device transfer functions; during inference, a hardware‑in‑the‑loop (HIL) setup swaps the software layer with the actual MTJ hardware, preserving the learned weights.
- Benchmark Suite: Evaluation spans event‑based vision (DVS gestures), a custom time‑reversed gesture benchmark, and a real‑world driving dataset (DDD‑20). Human‑behavior experiments are also run to align the model’s memory curves with those observed in psychophysical studies.
Results & Findings
| Benchmark | Baseline (same backbone) | IPNet | Relative Improvement |
|---|---|---|---|
| 11‑class DVS gestures | 97.8 % (RNN) | 99.65 % | +1.85 % |
| 22‑class time‑reversed gestures | 97.2 % (2+1D‑CNN) | 99.48 % | +2.28 % |
| DDD‑20 steering prediction (RMSE) | 0.112 rad | 0.096 rad | –14.4 % |
| Memory power (per neuron) | 1.2 µW (LSTM) | 0.42 nW | 2,874× lower |
| Area (per neuron) | 30 µm² (LIF) | 1.5 µm² | >20× reduction |
- Human‑like curves: In n‑back and interference tasks, the decay of the MTJ‑based memory matches the exponential forgetting observed in human subjects, confirming the biological plausibility of the approach.
- Robustness: Because the memory is physically volatile, the system is less sensitive to noise accumulation that typically plagues long‑range recurrent connections.
- Scalability: The same IPNeuron design can be tiled to support larger networks without a proportional increase in power or area, thanks to the capacitor‑free implementation.
Practical Implications
- Edge AI & IoT: Ultra‑low‑power, near‑sensor memory enables always‑on perception modules (e.g., wearables, drones) that can process spiking or event‑camera data without draining batteries.
- Autonomous Systems: Faster, more accurate short‑term context handling (e.g., steering decisions, obstacle anticipation) can be achieved with a fraction of the compute budget, simplifying hardware stacks for self‑driving cars or robots.
- Neuromorphic Chip Design: Demonstrates a viable path to replace conventional digital memory buffers with physically volatile neurons, opening new design spaces for ASICs targeting spiking neural networks.
- Human‑Computer Interaction: The alignment with human memory dynamics could be leveraged for adaptive interfaces that predict user intent based on recent interactions, improving responsiveness without heavy models.
Limitations & Future Work
- Device Variability: MTJ fabrication tolerances introduce stochasticity; while the current work shows robustness, large‑scale production will need tighter control or calibration schemes.
- Task Diversity: Benchmarks focus on vision‑centric, short‑term temporal tasks; extending to language modeling or long‑range sequence prediction remains an open question.
- Training Overhead: The current pipeline still relies on software training with measured device models; developing fully on‑chip learning algorithms for IPNeurons is a promising next step.
- Integration with Existing Stacks: Bridging the neuromorphic front‑end with conventional digital back‑ends (e.g., GPUs, CPUs) will require standardized interfaces and toolchains.
Overall, IPNet showcases how borrowing the brain’s intrinsic plasticity can deliver both performance and energy benefits, pointing toward a new generation of brain‑inspired, near‑sensor AI hardware.
Authors
- Jingli Liu
- Huannan Zheng
- Bohao Zou
- Kezhou Yang
Paper Information
- arXiv ID: 2512.15829v1
- Categories: cs.ET, cs.AI, cs.CV, cs.NE
- Published: December 17, 2025
- PDF: Download PDF