Intel Nova Lake die sizes leak, signaling higher cost — smaller compute tile still demands higher price on TSMC N2
Source: Tom’s Hardware
Image credit: Intel
Nova Lake Die Size Leak
Intel’s upcoming Core Ultra 4 series, codenamed Nova Lake, is expected to boost desktop and laptop performance against AMD’s offerings. A leak from @9550pro suggests that the Nova Lake compute tile—implemented on TSMC’s N2 process—has the following die sizes:
| Configuration | Die size |
|---|---|
| 8 × Coyote Cove P‑cores + 32 × Arctic Wolf E‑cores (no bLLC) | > 110 mm² |
| Same tile with 144 MB big last‑level cache (bLLC) | > 150 mm² |
For comparison, Arrow Lake’s compute tile (TSMC N3B, 8 × Lion Cove P‑cores + 16 × Skymont E‑cores) is believed to be around 117 mm²【source】(https://www.tomshardware.com/pc-components/cpus/arrow-lake-die-shot-shows-off-the-details-of-intels-chiplet-based-design).
Cost Implications
- Process technology: TSMC’s N2 is projected to be more expensive than N3B, despite a similar EUV layer count (20‑23). The use of EUV multipatterning on critical layers adds further cost.
- Die size: Larger die areas generally increase per‑chip cost, especially when combined with a more expensive process.
- bLLC impact: Adding the 144 MB bLLC pushes the tile size past 150 mm², which would make the compute tile significantly costlier. However, these tiles target high‑end, enthusiast‑grade CPUs, where price sensitivity is lower.
Tile Architecture
Nova Lake will follow Intel’s recent multi‑tile approach, comprising:
- Compute tile(s) – built with Intel’s 18A technology (Fab 32, Arizona) and TSMC’s N2 (Fab 22, Taiwan).
- System‑on‑Chip (SoC) tile
- GPU tile
- I/O tile
- Base tile
The exact number of compute tiles (one or two) and any variations between desktop and mobile parts have not been disclosed.
Production Outlook
Intel plans to manufacture the majority of Nova Lake silicon in‑house【source】(https://www.tomshardware.com/pc-components/cpus/intel-outlines-plan-to-break-free-from-tsmc-manufacturing-70-percent-of-panther-lake-at-intel-fabs-nova-lake-almost-entirely-in-house). Given that laptop CPUs currently outsell desktop CPUs roughly 7:3, it is reasonable to expect most laptop variants to be produced at Intel’s Arizona fab, mitigating the cost impact of the larger N2‑based compute tiles used for desktop‑focused, bLLC‑equipped parts.