More details emerge about how Intel now earns more revenue from each wafer by looking to the edges — analyst reports say reduced yield variability across each wafer leads to more sellable CPUs

Published: (April 29, 2026 at 07:00 AM EDT)
2 min read

Source: Tom’s Hardware

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Image credit: Intel

One of the highlights of Intel’s first‑quarter earnings report last week was improved sales of its client and data‑center processors, driven by improved output and yield as well as strong demand. The full story can be read in the original Tom’s Hardware article here.

Industry analyst Ben Bajarin noted that Intel is now selling CPUs that would previously have been considered “scrap” or “low‑expectation,” which helped boost margins. We followed up with industry veteran Dan Hutcheson, vice chair of TechInsights, for more details.

Yield Management and Edge Variability

Dan Hutcheson told Tom’s Hardware that while techniques like binning and statistical process control (SPC) have been standard practice at Intel for about 40 years, recent gains stem more from disciplined execution under the company’s new manufacturing leadership than from breakthrough inventions.

“When it comes to manufacturing, it takes a year or two to make these kind of dramatic changes,” Hutcheson said. “There’s just nothing new here. Intel has binned lots since the 1980s. Yield distributions are always heteroscedastic from the center to the edge of the wafer. Actually, one of the things Naga Chandrasekaran’s yield management efforts have changed is to narrow the spread to the edge of the wafer. Hence, they are getting more revenue‑per‑wafer for little cost. The beauty of it is that the improvements are node independent.”

According to Hutcheson, the shift began around late 2024 when Naga Chandrasekaran, head of Intel Foundry, joined the company and emphasized tightening yield distribution across the wafer by reducing edge‑related variability. This approach allows Intel to extract more sellable CPUs from each wafer without significant additional expense, improving revenue per wafer across all process nodes.

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