AMD to broaden and specialize EPYC CPUs, already working on Zen 7 architecture — increased customization to better address evolving AI and cloud needs
Source: Tom’s Hardware
Image credit: AMD
AMD’s Expanding EPYC Portfolio
Modern data‑center workloads are highly diverse, and hyperscale cloud providers increasingly develop custom silicon to meet specific needs. To stay competitive, AMD plans to broaden its CPU portfolio for data centers, targeting a wide range of AI and cloud workloads.
AMD’s enterprise CPU and GPU roadmap outlines upcoming products beyond the current Zen 4‑based 4th‑generation EPYC family.
Move Toward Segmented SKUs
With Zen 4, AMD offered a variety of SKUs for AI, cloud, enterprise, network/edge, and small‑business use cases. Zen 5 narrowed the lineup, but AMD’s recent messaging indicates a shift toward more segmented EPYC products, including:
- Workload‑specific SKUs
- Different core, cache, and interconnect configurations
- CPUs tailored for inference clusters, orchestration, low‑latency AI, and GPU‑heavy deployments
Lisa Su hinted that this expansion goes beyond the “Venice” codename and will eventually encompass Zen 7 and possibly Zen 8 microarchitectures.
“We are working with customers right now on beyond Venice and what we are doing in those architectures,” Su said.
CEO Commentary
During the earnings call, AMD’s CEO and chairman Lisa Su emphasized that server CPUs are no longer a single homogeneous category:
“The industry is going to need a broad portfolio of CPUs, not all CPUs are the same… you are going to need different CPUs for whether you are talking about general‑purpose operations or you are talking about head nodes or you are talking about agentic AI tasks.”
Su highlighted four optimization goals that AMD pursued with the Venice family:
- Throughput‑optimized
- Power‑optimized
- Cost‑optimized
- AI‑infrastructure‑optimized
Upcoming Zen 6‑Based EPYC Generations
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Venice (codenamed) – up to 256 cores, aimed at general‑purpose servers.
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Verona – purpose‑built for AI infrastructure, continuing AMD’s focus on AI‑centric silicon.
- Background: AMD previously introduced Verano CPUs for next‑generation rack‑scale AI solutions.
It remains unclear whether CPUs for agentic AI workloads will use distinct silicon or be derived from general‑purpose designs with different clock or cache settings.
Market Outlook
AMD projects the server‑CPU total addressable market to grow at a 35 % CAGR, reaching $120 billion by 2030. This growth supports the business case for developing specialized models despite the rising cost of CPU development and leading‑edge node implementation.
While no formal announcements of new CPU categories have been made, AMD’s leadership signals an ongoing expansion and specialization of EPYC offerings around AI infrastructure and other market segments.