A few CPU hardware bugs

Source: Hacker News

Intel’s misspelled CPUIDs

I’m aware of two situations where Intel have sold CPUs that report misspelled names in some of the strings returned by the CPUID instruction. This seems embarrassing for an organization of Intel’s size, but probably doesn’t hurt anybody’s ability to use the CPUs in question.

GenuineIotel

A web search for “GenuineIotel” reveals some discussions regarding this apparent typo, where some processors such as the Xeon E3‑1231 v3 return the string “GenuineIotel” (instead of the usual “GenuineIntel”) for the CPU manufacturer ID. This one is well‑known enough to be mentioned in the list of manufacturer IDs on Wikipedia.

It’s possible this misspelling is actually caused by a random bit error, since the characters ‘n’ and ‘o’ differ by only one bit; an unpredictable error that sets that bit could change GenuineIntel to GenuineIotel.

ore i5

Another error that seems more likely to be human error is in the Core i5‑1245U CPU, which returns a processor brand string Intel(R) ore(TM) i5-1245U, missing the ‘C’ in Core(TM) i5. Web searches for “Intel(R) ore(TM)” show a number of results which could be errors introduced by non‑technical users, but the Ubuntu certified configuration of the Dell Latitude 5430 with this CPU attests to this error actually being present in at least some machines.

It’s possible this misspelling is not part of the physical CPU design and is instead part of the system firmware, because on many AMD CPUs the CPU name is normally set by the system firmware. The error likely originates from the CPU design, its microcode, or Intel’s firmware package used by vendors. In any case, it is an embarrassing oversight.

ITE’s pipeline bug

This is an actual hardware bug discovered in an embedded processor that most people will never see.

ITE Tech is a Taiwanese chip company that sells a variety of specialized ICs, including PC embedded controllers used for tasks like keyboard handling and battery management in laptops. The IT81202 includes on‑chip peripherals for communicating with an x86 processor and a RISC‑V CPU for private use.

There is a pipeline bug in the IT81202 CPU: instructions that modify some registers immediately after a mul instruction may have no effect, as documented in the errata PDF. The workaround is to tell the compiler that the CPU does not support multiplication or division instructions, or to provide library implementations of integer multiply/divide operations that insert no‑op instructions after mul/div, as done in a Zephyr PR.

While less embarrassing than Intel’s CPUID typos, the bug highlights the challenges of designing pipelined CPUs, especially for a relatively new RISC‑V core at the time. Because the IT81202 is an embedded processor used in a limited set of devices, the invasive workaround is acceptable, but it serves as a cautionary tale for hardware designers.